TECH OFFER

A Complementary Metal-Oxide Semiconductor

TECHNOLOGY OVERVIEW

The present invention relates to a complementary metal-oxide semiconductor for performing logical functions. The complementary metal-oxide semiconductor comprises a wafer, an oxide layer, an interfacial layer and a plurality of metal terminals. The wafer is configured as a base for the complementary metal-oxide semiconductor. The oxide layer is deposited onto interfacial layer as an electrical insulator for the wafer. The interfacial layer is configured to bind the wafer with the oxide layer. The plurality of metal terminals is configured as a point of contact for source terminals, drain terminals, and gate input.

Mega - Trends

Innovative Technologies of the Future, Chemicals and Materials, Energy and Power, Automotive, Measurement and Instrumentation, Electronics and Security

Technology Readiness Level (TRL)

TRL 5

Patent Number

PI 2021003911

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Contact person for this offer:

ChM Dr. Lee Ching Shya, PhD (Dual), RTTP

Technology Transfer Manager

Email: leecs@um.edu.my

Tel: +603-7967-7351/ 013-2250151

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